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#93Scientific
xilinx-skill
by QingquanYao
Xilinx/AMD FPGA & MPSoC Vivado design skill for Claude — covers block design, IP config, XDC constraints, synthesis, implementation and bitstream generation.
Star history · 30 days
53 → 238
Traction
Traction is a custom score that blends recent GitHub signals to estimate how much attention a skill is actually gaining.
Learn more in MethodologyActive69/100
Apr 13Apr 23May 3May 13
Velocity
Last 7 days+25 (+11.7%)
Last 30 days+185 (+349.1%)
First star1mo ago
Stars per day6
Forks14 · 7d 0.0%
Watchers9 · 7d 0.0%
Repo signals
Commits (30d)15
Contributors1
Last push18d ago
LicenseNone
LanguagePowerShell
Integrations
CLAUDE.mdNo
AGENTS.mdYes
MCPNo
HooksNo
Compatible agents
Claude Code